Coarse Image Region Segmentation Using Resistive-fuse Networks Implemented in FPGA
نویسندگان
چکیده
Two digital LSI implementation methods for nonlinear resistive networks are proposed; one is for pixel-parallel operation and the other is for pixel-serial operation. we have designed digital circuits that emulate the operation of analog nonlinear resistive networks by discrete-time dynamics based on clock operation. The steady state of the networks is obtained by repeating the updating sequence. The resistive-fuse network has been implemented in an FPGA. Coarse region segmentation of real images with 64 64 pixels at the video rate is successfully demonstrated by using an FPGA.
منابع مشابه
A face/object recognition system using coarse region segmentation and dynamic-link matching
An image recognition model that combines some neural-network-based image processing models is proposed. The recognition procedure consists of coarse region segmentation/extraction performed by a resistive-fuse network, Gabor wavelet transformation and dynamic-link matching. We have also developed a PC-based face/object recognition system including FPGA implementation of the resistive-fuse netwo...
متن کاملA Face/Object Recognition System Using FPGA Implementation of Coarse Region Segmentation
A PC system for recognition of natural scene images including human faces and various objects is proposed. Coarse region segmentation of real images with 64×64 pixels at the video rate is achieved by using the FPGA implementation of resistive-fuse networks. A flexible template matching based on dynamic-link architecture is performed on our PC system.
متن کاملCoupled MRF models and CMOS circuits for coarse image-region segmentation
VLSI image/scene recognition systems inspired by brain architecture Combining some processing models inspired by brain vision functions, we have constructed a real-time image/scene recognition VLSI system that can recognize natural scenes including human faces and different objects. The processing functions used in the system are coarse region segmentation using resistive-fuse networks and imag...
متن کاملObject Detection and Segmentation Algorithm Implemented on a Reconfigurable Embedded Platform Based FPGA
In this article, we present a mixed software/hardware Implementation on a Xilinx’s Microblaze Soft core based FPGA platform. The reconfigurable embedded platform designed to support an important algorithm in image processing which is region color image segmentation for detecting objects based on RGB to HSL transformation. The proposed work is implemented and compiled on the embedded development...
متن کاملDesign of a Pixel-parallel Feature Extraction Vlsi System for Biologically-inspired Object Recognition Methods
This paper proposes a biologically-inspired feature extraction method, which consists of coarse region segmentation by a resistive-fuse network and feature extraction by Gabor wavelet transforms. Their pixel-parallel VLSI implementation based on the pulse modulation circuit architecture is described, and measurement results of Gabor filter operation by a test LSI chip with 1-D 20-pixels are pre...
متن کامل